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I am learning how to write makefile to compile a c program. I have a directory structure like this: . ├── include │ └── library.h ├── lib │ └── library.c ├── makefile └── obj My makef...
#7: Post edited
by
Vanity Slug ❤️
·
2024-10-11T11:39:12Z (7 days ago)
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%` (because based on my limited/wrong understanding that's how it *should* work), like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting these errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
- ---
**Update 1** (after receiving an answer)- I also tried making use of wildcard but was not successful with it. (I did not mention it earlier because I thought this was not the way to go). For the record, here is the latest makefile I had:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- FILES_LIB=$(wildcard $(DIR_LIB)/*.c)
- FILES_OBJ=$(patsubst $(DIR_LIB)/%.c,$(DIR_OBJ)/%.o,$(FILES_LIB))
- all: $(FILES_OBJ)
- $(DIR_OBJ)/%.o: $(FILES_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%` (because based on my limited/wrong understanding that's how it *should* work), like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting these errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
- ---
- **Update 1** (after receiving an answer from mr Tsjolder )
- I also tried making use of wildcard but was not successful with it. (I did not mention it earlier because I thought this was not the way to go). For the record, here is the latest makefile I had:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- FILES_LIB=$(wildcard $(DIR_LIB)/*.c)
- FILES_OBJ=$(patsubst $(DIR_LIB)/%.c,$(DIR_OBJ)/%.o,$(FILES_LIB))
- all: $(FILES_OBJ)
- $(DIR_OBJ)/%.o: $(FILES_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
#6: Post edited
by
Vanity Slug ❤️
·
2024-10-11T11:38:40Z (7 days ago)
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%` (because based on my limited/wrong understanding that's how it *should* work), like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
Why am I getting these errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%` (because based on my limited/wrong understanding that's how it *should* work), like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting these errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
- ---
- **Update 1** (after receiving an answer)
- I also tried making use of wildcard but was not successful with it. (I did not mention it earlier because I thought this was not the way to go). For the record, here is the latest makefile I had:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- FILES_LIB=$(wildcard $(DIR_LIB)/*.c)
- FILES_OBJ=$(patsubst $(DIR_LIB)/%.c,$(DIR_OBJ)/%.o,$(FILES_LIB))
- all: $(FILES_OBJ)
- $(DIR_OBJ)/%.o: $(FILES_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
#5: Post edited
by
Vanity Slug ❤️
·
2024-10-10T16:09:19Z (8 days ago)
How to compile all files in a directory.
- make: How to compile all files in a directory.
#4: Post edited
by
Vanity Slug ❤️
·
2024-10-10T15:34:12Z (8 days ago)
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%` (because based on my limited/wrong understanding that's how it *should* work), like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
Why am I getting this errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%` (because based on my limited/wrong understanding that's how it *should* work), like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting these errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
#3: Post edited
by
Vanity Slug ❤️
·
2024-10-10T15:32:53Z (8 days ago)
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%`, like so:- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting this errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%` (because based on my limited/wrong understanding that's how it *should* work), like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting this errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
#2: Post edited
by
Vanity Slug ❤️
·
2024-10-10T15:30:23Z (8 days ago)
How compile all files in a directory.
- How to compile all files in a directory.
I am learning how to write makefile to compile a c program. I have a directory structure like this:- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%`, like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting this errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
- []()I am learning how to write makefile to compile a c program. I have a directory structure like this:
- ```
- .
- ├── include
- │ └── library.h
- ├── lib
- │ └── library.c
- ├── makefile
- └── obj
- ```
- My makefile has this content:
- ```make
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h
- gcc -c -o $@ $<
- ```
- And it works: `library.o` gets generated inside `obj` folder.
- Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%`, like so:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- but I get this error:
- ```
- make: *** No targets. Stop.
- ```
- I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now:
- ```
- DIR_INC=include
- DIR_LIB=lib
- DIR_OBJ=obj
- all: $(DIR_OBJ)/%.o
- $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h
- gcc -c -o $@ $<
- ```
- And I get this error:
- ```
- make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop.
- ```
- Why am I getting this errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.
#1: Initial revision
by
Vanity Slug ❤️
·
2024-10-10T15:30:04Z (8 days ago)
How compile all files in a directory.
I am learning how to write makefile to compile a c program. I have a directory structure like this: ``` . ├── include │ └── library.h ├── lib │ └── library.c ├── makefile └── obj ``` My makefile has this content: ```make DIR_INC=include DIR_LIB=lib DIR_OBJ=obj $(DIR_OBJ)/library.o: $(DIR_LIB)/library.c $(DIR_INC)/library.h gcc -c -o $@ $< ``` And it works: `library.o` gets generated inside `obj` folder. Now I want to make it generic so that ALL files inside `lib` folder get compiled to object files into `obj` folder, so I replace `library` with `%`, like so: ``` DIR_INC=include DIR_LIB=lib DIR_OBJ=obj $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h gcc -c -o $@ $< ``` but I get this error: ``` make: *** No targets. Stop. ``` I find this Q/A: https://stackoverflow.com/questions/33530341/no-targets-stop. Based on that I add `all:` target, so my makefile looks like this now: ``` DIR_INC=include DIR_LIB=lib DIR_OBJ=obj all: $(DIR_OBJ)/%.o $(DIR_OBJ)/%.o: $(DIR_LIB)/%.c $(DIR_INC)/%.h gcc -c -o $@ $< ``` And I get this error: ``` make: *** No rule to make target 'obj/%.o', needed by 'all'. Stop. ``` Why am I getting this errors and how do I fix them? My goal is to compile all `*.c` files inside `lib` directory into `*.o` object files into `obj` directory.